Desired experience in design of VCOs, PLLs, DLLs, ADCs, DACs, clock and data recovery, broadband amplifiers, bias generators, clock distribution networks, high frequency I/Os and/or high frequency CML designs . Teradyne’s Semiconductor Test Division in Agoura Hills, CA is looking for an enthusiastic candidate for the position of Semiconductor Design Engineer, to design high-speed analog circuits in mixed-signal ASICs for ATE (Automatic Test Equipment) instruments.