Senior ASIC Design Engineer Jobs

324 jobs

Senior ASIC Design Engineer - Memory Controller Job Number: 40593025 Santa Clara Valley, California, United States Posted: Jun. 1, 2015 Weekly Hours: 40.00 Job Summary Imagine what you could do here. At Apple, great ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accom...

Drive new memory system architectures from DRAM up. Explore architecture trade-offs in system performance, area, and power consumption. Develop interconnect (Network-on-chip - NOC) and memory hierarchies for high performance parallel computer architectures (system-on-a-chip SOC). Work with performance team to develop performance/power simulators, models and test suites. Design a memory sub-sys...

Senior ASIC SoC Design Engineer-748527 Description As part of the Technology & Manufacturing Group (TMG), the Intel Custom Foundry (ICF) is looking for talented and ambitious individuals to develop design methodology and deploy them to external customer design projects and internal Testchip Projects on Intel Foundry process technology, and help build a winning team. In this position, you will pr...

Req ID: 16481 As a Senior ASIC Design Engineer in Micron’s Advanced Controller Group, you will develop and verify cutting edge controllers which leverage Micron’s newest memory technology. You will be involved in the design and modeling of next generation memory interfaces for large mixed signal ASICs. This includes architecting, implementing, synthesizing and testing digital and custom circuit m...

Drive new memory system architectures from DRAM up. Explore architecture trade-offs in system performance, area, and power consumption. Develop interconnect (Network-on-chip - NOC) and memory hierarchies for high performance parallel computer architectures (system-on-a-chip SOC). Work with performance team to develop performance/power simulators, models and test suites. Design a memory sub-sys...

REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA CLASSIFICATION: Exempt Summary The senior IC designer leads design engineers and mask designers in the development of high speed IC chips for optical communication applications. He is responsible for the design, layout, and lab characterization and will coordinate with production testing and foundry. Hands-on design and test capa...

ASIC & FPGA design and verification. Generation of ASIC/FPGA design requirement specifications, VHDL and/or Verilog code generation. VHDL and/or SystemVerilog test bench generation and simulation using Mentor Graphics Modelism/Questa. Synthesis including generation of constraints, place and route including generation of constraints, static timing analysis, power analysis, clock domain crossing and...

Candidate will be part of the design team for the next-generation Marvell Ethernet PHY IC. Responsibilities include logic design, DFT work, verification testcase development, synthesis, and timing convergence. Interaction with other teams will be a key skill in this position....

Requirements: 3 years plus experience in developing, implementing, and verification of high performance communications and DSP ASIC products Extensive RTL experience including design, verification, and synthesis. DFT design flow and working experience with atpg and membist implementation, patterns generation and ATE bring-up will be needed Strong UNIX-based EDA tool skills and in-depth knowledge o...

Req ID: 16481 As a Senior ASIC Design Engineer in Micron’s Advanced Controller Group, you will develop and verify cutting edge controllers which leverage Micron’s newest memory technology. You will be involved in the design and modeling of next generation memory interfaces for large mixed signal ASICs. This includes architecting, implementing, synthesizing and testing digital and custom circuit m...

As a senior member of the SOC Design team you will be responsible for the following 1) Microarchitecture and design of RTL code for high performance (low latency, high bandwidth, high frequency), low area, and low power 2) Own all aspects of development design for large SOC blocks including: Internal and external IP integration, design of system bus and control bus logic for connectivity of IP b...

REPORTS TO: Director of ASIC Engineering LOCATION: San Jose, CA CLASSIFICATION: Exempt Summary Based in San Jose, CA, we are a fast-growing Optical, RF & ASIC components company that develops custom MMICs and multichip modules (MCM) targeting the medium and long-haul optical transmission market, high-performance test and measurement and broadband communications markets and Industrial sector w...

•Participate in Cache micro architecture development from specifications found from architecture guideline and model analysis. •Explore architecture trade-offs in system performance, area, and power consumption along with the performance analysis team. •Develop/debug RTL design of different sections of the cache. •Work with physical design team to close timing of the same. BS/MS/PhD in a relev...

Req ID: 25672 BSEE or MSEE with a thorough understanding of ASIC DFT implementation and development, with minimum 10 + years of experience Extensive DFT background as well as a diverse skill set that spans the overall ASIC design process. In depth technical knowledge and hands-on experience in developing and implementing at-speed test techniques, including Logic, Memory bist and repair, Mixed-si...

. . . Pagina Inicial Ultimas Ofertas Pesquisa Avan?ada Emprego Detalhe Oferta de Emprego Pesquisar por Zona e Categoria Pesquisar por Palavra Chave Ver mais ofertas:Onde?O Qu?? O que procura? 30-4-2015 Coordenador de Linha Tetra Pack (m/f) 30-4-2015 Mec?nico Moldes Pl?stico (m/f) 30-4-2015 Project Leader (m/f) 30-4-2015 Manufacturing & Quality Engineer (m/f) 30-4-2015 Precisa-se Eng...

Req ID 320203BR Industry Job Title Senior ASIC & FPGA Design Engineer Job Code/Title E2523:ASIC & FPGA Design Eng Sr Job Description ASIC & FPGA design and verification. Generation of ASIC/FPGA design requirement specifications, VHDL and/or Verilog code generation. VHDL and/or SystemVerilog test bench generation and simulation using Mentor Graphics Modelism/Questa. Synthesis including generatio...

Senior ASIC Design Engineer - Memory Controller Job Number: 38228546 Santa Clara Valley, California, United States Posted: 26-Jan-2015 Weekly Hours: 40.00 Job Summary Imagine what you could do here. At Apple, great ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomp...

Senior ASIC Design Engineer - Memory Controller Job Number: 37561133 Austin, Texas, United States Posted: 23-Dec-2014 Weekly Hours: 40.00 Job Summary Imagine what you could do here. At Apple, great ideas have a way of becoming great products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Apple is bu...

ASIC & FPGA design and verification. Generation of ASIC/FPGA design requirement specifications, VHDL and/or Verilog code generation. VHDL and/or SystemVerilog test bench generation and simulation using Mentor Graphics Modelism/Questa. Synthesis including generation of constraints, place and route including generation of constraints, static timing analysis, power analysis, clock domain crossing and...

Senior ASIC Design Engineer - Fabric Job Number: 38408168 Santa Clara Valley, California, United States Posted: 05-Feb-2015 Weekly Hours: 40.00 Job Summary Imagine what you could do here. At Apple, great ideas have a way of becoming great products, services, and customer experiences very quickly. Apple is leading the charge in high performance mobile computing with state of the ART SOC's ann...